RFIC Test Engineer

Summary Do you have a passion for invention and self-challenge? Do you thrive with pushing the limits of what’s considered feasible? As part of an outstanding `team, you’ll craft sophisticated, groundbreaking projects that deliver more performance in our products than ever before. You’ll work across fields to transform improved hardware elements into a single, coordinated design. Join us, and you’ll help us innovate new technologies that continually outperform the previous iterations! By collaborating with other product development groups across Apple, you’ll push the industry boundaries of what wireless systems can do and improve the product experience for our customers worldwide. Description The wireless RFIC team architects, designs, and validates radio transceivers integrated into sophisticated wireless SoCs. Our transceivers have powered wireless connectivity solutions for Apple wearable products, enabling the smallest form factor at the lowest power envelope. You will have the opportunity to do innovative development in transceiver design while working closely with systems and product teams at Apple! In this role, you will be part of an RFIC design team and perform the tests, debugging, and measurements for RF SOC IP. Would you like to join us and become part of this diverse team? Minimum Qualifications BS and a minimum of 3 years relevant industry experience. Experience in RF test development, debugging, and reporting. Scripting and debugging knowledge in any of the following: Python, Perl, TCL, C++, or equivalent. Solid understanding of RF test equipment (network analyzer, spectrum analyzer, vector signal analyzer, vector signal generator, etc.). Good knowledge of RF, PLL, and general wireless systems measurements (i.e., IP3, NF, ACPR, phase noise, lock time, etc.). Preferred Qualifications MS and PhD plus relevant industry experience. Strong RF background and familiarity with RF systems fundamentals. Some experience in RF PCB board design, debugging, and development. Exposure to RFIC design and simulation/verification. Exposure to SOC design and simulation/verification.