- Tlaquepaque, Jalisco, Mexico
Responsible for layout design of leaf cell/Stdcell or sub blocks in semiconductor HBM technology.
Responsibilities
- Responsible for Layout design of leaf cell/Stdcell or sub blocks
- Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design
- Demonstrate commitment towards the work/assignment and plan proactively to finish the work on time
- Interpret the DRC/LVS/ and other physical verification checks
- Effectively communicating with Internal teams to assure the success of a layout project
Requirements
- Bachelor’s degree, master or PhD in Electronics, Mechatronics, Robotics Engineering, Nanotechnology or similar
- Nice to have: participated in internships or school projects related to pre-silicon circuit design
- Nice to have: organized and goal focused thinking
- Nice to have: experience using or creating AI-enabled methodologies for automation and problem solving