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Skill:Board/platform-level debug

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1–4 jobs· newest first

SMTS Systems Design Engineer
Advanced Micro Devices, Inc · Austin, US
IP-Post Silicon Validation Engineer
Advanced Micro Devices, Inc · Markham, Canada+1 more
IP-Post Silicon Validation Engineer
Advanced Micro Devices, Inc · Markham, Canada
IP Silicon Validation Engineer
Advanced Micro Devices, Inc · Markham, Canada+1 more

+10K new in the last hour

SMTS Systems Design Engineer

Advanced Micro Devices, Inc · Posted Nov 6, 2026

Austin, Texas, United States
4+ years

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Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing.

Responsibilities

Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing
Design a complete and complex framework, system or product
Define processes for technical platforms, system specifications, input/output and working parameters for hardware and/or software compatibility
Conceive system interfaces and business application prototypes
Identify, analyze and resolve system design weaknesses

Requirements

Master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering Technology, Electronics Engineering, or related field
Bachelor’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering Technology, Electronics Engineering, or related field

Skills

Tool and script development Programming or scripting in C, C++, Perl, Ruby, or Python Debug techniques and methodologies Common lab equipment, including protocol/logic analyzers and oscilloscopes Board/platform-level debug, including delivery, sequencing, analysis, and optimization System architecture, technical debug, and validation strategy

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IP-Post Silicon Validation Engineer

Advanced Micro Devices, Inc · Posted Nov 5, 2026

Markham, Ontario, Canada +1 more

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IP Validation Design Engineer for AMD NBIO Team

Locations (2)

Markham, Ontario, Canada
Vancouver, British Columbia, Canada

Responsibilities

Drive planning, validation, and debug of hardware IP for AMD SOC programs
Comprehend SOC system and align firmware, BIOS, and software
Work cross-functionally with IP/Domain architects
Define, document, execute and report functional test plans
Drive technical innovation in IP validation tools and automation

Requirements

Bachelor’s or Master’s degree in EE, CS or related field
Nice to have: CPU or GPU architecture
Nice to have: Memory subsystem
Nice to have: Fabrics
Nice to have: High Speed I/O

Skills

Digital logic design

IP-Post Silicon Validation Engineer

Advanced Micro Devices, Inc · Posted Nov 5, 2026

Markham, Ontario, Canada

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IP Validation Design Engineer responsible for planning, validating, debugging and improving AMD IP for SOC programs.

Responsibilities

Drive planning, validation, and debug of hardware IP for AMD APU, CPU, Compute and Discrete Graphics SOC programs
Comprehend SOC as a complete system and ensure firmware, BIOS and software alignment
Work cross-functionally with IP/Domain architects to assess technical issues and develop solutions
Define, document, execute and report functional test plans and validation strategies
Drive technical innovation in IP validation tools and automation

Requirements

Bachelor’s or Master’s degree majoring in EE, CS or related field

Skills

digital logic design verification post-silicon validation ASIC debug techniques physical and protocol level knowledge board/platform-level debug scripting Ruby Python protocol/logic analyzers oscilloscopes

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IP Silicon Validation Engineer

Advanced Micro Devices, Inc · Posted Nov 3, 2026

Markham, Ontario, Canada +1 more

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IP Validation Design Engineer responsible for planning, validating, and debugging hardware IP for AMD SOC programs.

Locations (2)

Markham, Ontario, Canada
Vancouver, British Columbia, Canada

Responsibilities

Drive planning, validation, and debug of various hardware IP for forthcoming AMD APU, CPU, Compute and Discrete Graphics SOC programs
Define, document, execute and report overall functional test plan and validation strategy for a set of AMD IPs
Drive technical innovation to enhance AMD's capabilities in IP validation
Debug IP issues found during pre-silicon, bring-up, system validation, and production phases of the SOC programs
Engage in pre-silicon ‘shift left’ activities with cross-functional teams

Requirements

Bachelor’s or master’s degree majoring in EE, CS or related field

Skills

digital logic design verification post-silicon validation ASIC debug techniques physical and protocol levels of high-speed interfaces PCIe/CXL/UALINK board/platform-level debug scripting Ruby scripting Python protocol analyzers oscilloscopes Ruby Python

Benefits

AMD benefits at a glance

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Post-silicon validation

ASIC debug techniques

High-speed interface knowledge

Board/platform-level debug

Scripting (Ruby, Python)

Protocol/logic analyzers

See full job description