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1–2 jobs· newest first

Apprentice (Technical-Engineer)New
Synopsys · Hyderabad, India+1 more
On-site · Full-time
Apprentice (Technical-Engineer)New
Synopsys · Hyderabad, India+1 more
On-site · Full-time · Intern

+10K new in the last hour

Apprentice (Technical-Engineer)

Synopsys · Posted Nov 3, 2026

Hyderabad, Telangana, India +1 more
On-site
Full-time

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Support layout development for analog and mixed-signal CMOS circuits under the guidance of experienced layout engineers.

Locations (2)

Hyderabad, Telangana, India
Bengaluru, Karnataka, India

Responsibilities

Support layout development for analog and mixed-signal CMOS circuits
Collaborate with the layout team to understand schematics and translate them into physical layouts that meet design specifications
Assist in resolving layout issues identified during design reviews or physical verification checks
Learn and apply standard layout methodologies, best practices, and tool flows used in production environments
Participate in physical verification flows including DRC and LVS to ensure layouts are correct and manufacturable

Requirements

B.E. or B.Tech in Electronics, Electrical, Instrumentation, ECE, EEE, VLSI, or related fields

Skills

CMOS layout techniques design rules second-order layout effects MS Office Suite Virtuoso Custom Compiler

Benefits

Health, wellness, and financial benefits

See full job description

Apprentice (Technical-Engineer)

Synopsys · Posted Nov 3, 2026

Hyderabad, Telangana, India +1 more
On-site
Full-time · Intern
0+ years

Apply with RefersoAI Apply on careers page

Support layout development for analog and mixed-signal CMOS circuits under the guidance of experienced layout engineers.

Locations (2)

Hyderabad, Telangana, India
Bengaluru, Karnataka, India

Responsibilities

Support layout development for analog and mixed-signal CMOS circuits
Collaborate with the layout team to understand schematics and translate them into physical layouts
Assist in resolving layout issues identified during design reviews or physical verification checks
Learn and apply standard layout methodologies, best practices, and tool flows used in production environments
Participate in physical verification flows including DRC and LVS to ensure layouts are correct and manufacturable

Requirements

B.E. or B.Tech in Electronics, Electrical, Instrumentation, ECE, EEE, VLSI, or related fields

Skills

CMOS layout techniques design rules second-order layout effects MS Office Suite Virtuoso Custom Compiler

Benefits

Health, wellness, and financial benefits

See full job description