- Staff
- 7+ years
Deliver end-to-end DFT solutions for customer designs ranging from mid-complexity ASICs to massive multi-IP SoCs, covering architecture planning, scan insertion, ATPG pattern generation, MBIST integration, and silicon bring-up support.
Compensation
Your recruiter will provide more details about the salary range and benefits during the hiring process.
Responsibilities
- Deliver end-to-end DFT solutions for customer designs ranging from mid-complexity ASICs to massive multi-IP SoCs, covering architecture planning, scan insertion, ATPG pattern generation, MBIST integration, and silicon bring-up support
- Provide technical guidance during early design phases, helping customers budget for test, plan DFT architectures, and avoid costly mistakes before RTL freeze
- Implement and validate scan, MBIST, and IEEE 1687 test solutions, running simulations, debugging failures, and ensuring coverage targets are met
- Join customer design reviews to understand their flows, identify gaps or risks, and recommend improvements grounded in real-world test methodology
- Prototype and validate next-generation DFT techniques in collaboration with solution architects, turning experimental ideas into production-ready workflows
Requirements
- Bachelor's degree with 7+ years of hands-on experience
- Master's degree with 5+ years
- Nice to have: MBIST in automotive or safety-critical design environments
- Nice to have: ISO 26262