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1–3 jobs· newest first

Senior Software Engineer – Kotlin, VPNew
Citi · Mississauga, Canada
$121K–$171KFull-time · Vp
Backend Software Development Engineer – ExpertNew
Hitachi · Bengaluru, India
Senior
Senior Software Engineer – Ultra Low Latency Risk Engine Lead Developer, Vice President
Citi · Singapore, Singapore
Full-time · Senior

+10K new in the last hour

Senior Software Engineer – Kotlin, VP

Citi · Posted Nov 9, 2026

Mississauga, Ontario, Canada
Full-time · Vp
$121K–$171K per year
12+ years

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Lead senior software engineer responsible for architecting, designing, and delivering high-throughput, low-latency distributed server‑side systems for trading and risk operations.

Compensation

$120,800.00 - $170,800.00

Responsibilities

Design, build, test, and deploy resilient, highly scalable, low‑latency distributed backend services using Kotlin and/or Java
Lead architecture decisions and code reviews to ensure scalability, thread safety, fault tolerance, and optimal memory management
Drive modular software design, Clean Architecture principles, domain‑driven design, and test‑driven development
Architect and manage CI/CD pipelines utilizing Jenkins, Gradle, and containerization workflows
Package and deploy microservices and distributed workloads using Helm charts on Kubernetes/OpenShift

Requirements

Bachelor’s or Master’s Degree in Computer Science, Software Engineering, Financial Engineering, Mathematics, or a related quantitative/technical discipline (or equivalent practical experience)
Nice to have: Financial markets domain knowledge
Nice to have: Equity derivatives
Nice to have: Structured products
Nice to have: Risk engine

Skills

Java Kotlin JVM internals Garbage collection tuning Concurrent programming Asynchronous programming Domain‑driven design Microservices architecture API design Apache Kafka Solace RabbitMQ Linux Unix Bash Shell scripting Gradle Maven Jenkins Docker Kubernetes Helm CI/CD pipelines Performance tuning Profiling Infrastructure automation JVM Shell

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Backend Software Development Engineer – Expert

Hitachi · Posted Nov 9, 2026

Bengaluru, Karnataka, India
Senior
12+ years

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Lead the architecture and evolution of core storage services, designing high-throughput, fault-tolerant backend systems for multi-petabyte scale.

Responsibilities

Lead architecture, design and implementation of core backend services
Design distributed, highly available systems
Own scalability and performance of data and metadata layers
Drive evolution of database and messaging layers
Design and improve replication, disaster recovery and data integrity features

Requirements

BS or MS in Computer Science, Computer Engineering or a related field
Nice to have: object storage internals
Nice to have: S3 API
Nice to have: file or block storage
Nice to have: SAN

Skills

Java JVM internals garbage collection tuning heap and thread dump analysis Go Python concurrency

Senior Software Engineer – Ultra Low Latency Risk Engine Lead Developer, Vice President

Citi · Posted Nov 3, 2026

Singapore, Singapore
Full-time · Senior
10+ years

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Design, develop, and maintain ultra low‑latency risk engine components for cash equities electronic trading, leading architecture and mentoring across global centers.

Responsibilities

Design, develop, and maintain the ultra low‑latency Risk Engine
Architect and optimize high‑performance, lock‑minimal, multi‑threaded components
Integrate risk and position components with client connectivity and market access layers
Apply deep expertise in JVM performance tuning, memory management, garbage collection avoidance, and native performance engineering
Perform system‑level performance tuning to minimize end‑to‑end latency and jitter

Requirements

Bachelor's degree in Computer Science, Engineering, or a related field

Skills

Java C++Rust Low Latency Java JVM performance tuning Garbage Collection tuning Aeron

data structures

consensus/replication

consistency models

fault tolerance

query optimization

RESTful/HTTP services

asynchronous message-driven architectures

automated testing

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NUMA-aware design

CPU core pinning

Linux kernel tuning

High‑throughput trading systems

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