- Pune, Maharashtra, India
- On-site
- Full-time · Staff
- 10+ years
Lattice is seeking a Senior Staff Signal and Power Integrity Engineer to perform pre-layout and post-layout simulation, SI/PI/EMC design-optimization, and system integration design.
Responsibilities
- Perform pre-layout and post-layout simulation flow.
- Performing DC IR drop and AC impedance simulation.
- Execute SI/PI/EMC design-optimization for chip/package/system integration and electrical performance optimization, e.g., eye diagram, jitter, IR/EM, system-PI, cross-talk, and SSN/SSO.
- Develop system integration design guidelines with SI/PI total solution for advanced packaging technologies (FC/InFO etc.).
- Create simulation models and develop simulation methodology for SI/PI design.
Requirements
- MS or PhD in Electrical Engineering