- Mountain View, California, United States
- On-site
- Full-time · Staff
- $207K–$300K per year
- 8+ years
Lead performance engineering for ML compiler and TPU co-design, defining strategy to enable open‑source ML models to achieve TPU performance.
Compensation
US: $207000 - $300000 (USD) + 20% bonus target + equity + benefits
Responsibilities
- Deliver certified performance benchmarks six months pre‑pilot as primary targets for pricing, capacity planning, and kernel optimization.
- Adapt emerging open‑source models into TPU‑native paired variants, including sparsity optimization, to demonstrate differentiated TPU performance.
- Ingest and optimize multi‑turn agentic workflows, reasoning loops, and prompt and decode topologies prior to silicon tape‑out.
- Author robust reference implementations using PyTorch, JAX, or Pallas that meet pre‑pilot goals under compiler constraints.
- Partner with director and executive technical leadership across TPU Hardware, XLA Compiler, and Cloud AI Systems to steer multi‑year roadmaps.
Requirements
- Bachelor's degree
- Nice to have: high‑performance simulation tools
- Nice to have: emulation frameworks
- Nice to have: analytical performance modeling pipelines
- Nice to have: roofline models