An internship within the Advanced Packaging Technology Development team to support development of next-generation interconnect technologies like hybrid bonding, micro bump, TSV, and thermal management.
- Lead structured problem-solving activities using methodologies such as Kepner-Tregoe (KT) to address process and yield challenges.
- Define, complete, and analyze Design of Experiments (DoE) for advanced packaging and interconnect process development.
- Analyze process, line-monitoring, and yield data; develop new monitoring methods and critical metrics to support process optimization.
- Present technical findings and collaborate with engineering teams across sites and functional areas.
- Apply AI and Code Assist to develop Agent-based solutions that enhance data analysis, engineering workflows, or process monitoring.
- Currently enrolled in an accredited university pursuing a Master’s degree or PhD in a semiconductor-related field
- Nice to have: semiconductor process technologies
- Nice to have: advanced packaging
- Nice to have: back-end-of-line (BEOL)
- Nice to have: advanced interconnect
