- Mountain View, California, United States
- Full-time · Senior
- $120K–$235K per year
- 1+ years
Lead validation engineering for AI silicon designs, developing strategies, test plans, and debugging post‑silicon failures.
Compensation
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Responsibilities
- Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements
- Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools, and other verification collateral
- Execute content in post-silicon, triage, and debug failures
- Engage with partners to drive continuous improvement to design, validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
- Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
Requirements
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field