- Tualatin, Oregon, United States +1 more
- Hybrid
- Full-time · Senior
- $88K–$194K per year
- 6+ years
Lead defectivity analysis and system engineering for semiconductor fabrication equipment.
Locations (2)
- Tualatin, Oregon, United States
- Fremont, California, United States
Compensation
CA San Francisco Bay Area Salary Range for this position: $88,000.00 - $194,000.00.
Responsibilities
- Manage design tradeoffs
- Develop system and subsystem defectivity requirements
- Identify and resolve particle, contamination, and defectivity risks
- Design experiments to characterize subsystems
- Analyze data using Statistical Analysis of Variation and SPC methods
Requirements
- Bachelor’s degree
- Master’s degree
- PhD
- Nice to have: 8+ years related experience
- Nice to have: AI usage