- San Jose, California, United States
- On-site
- Full-time · Principal
- $219K–$351K per year
- 12+ years
Lead DRAM circuit design and architecture for next-generation memory technology
Compensation
$219,000—$351,000 USD
Responsibilities
- Develop DRAM architecture and optimize floor plan for next generation DRAM
- Develop the Row, Column Bank circuit design, Data path and related test modes
- Identify device requirements for the advanced memory product design
- Collaborate with process integration, device modeling group for DRAM design architecture/circuit development and technology optimization
- Characterize power delivery network related performance and optimize the circuit and architecture
Requirements
- BS
- MS
- PhD
- Nice to have: memory design
- Nice to have: design software