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1–2 jobs· newest first

Member of the Technical Staff (MTS) DRAM PI
Micron Technology · Boise, US
Staff Engineer, Survivability
f7d8749a-72d6-407c-bf98-292ea630c73a · Seattle, US
Full-time · Senior

+10K new in the last hour

Member of the Technical Staff (MTS) DRAM PI

Micron Technology · Posted Nov 9, 2026

Boise, Idaho, United States
8+ years

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Provide technical leadership for memory process integration, leading device-module and process-integration development, and influencing technical decisions throughout the development and manufacturing lifecycle.

Responsibilities

Define and optimize advanced semiconductor process flows, including integration requirements and performance specifications.
Lead the resolution of complex integration issues across process, materials, device, and product engineering teams.
Drive device performance and reliability improvements, including electrical uniformity, leakage, time-dependent dielectric breakdown, and long-term reliability.
Build and complete structured design-of-experiments studies to accelerate technical learning, reduce defects, and improve performance.
Lead data-driven yield-improvement activities and support technology transfer across engineering and manufacturing teams.

Requirements

Master’s degree or equivalent experience, or PhD, in Electrical Engineering, Microelectronics, Materials Science, Chemical Engineering, or a related field.
Nice to have: advanced semiconductor module interactions
Nice to have: system-level integration behavior
Nice to have: advanced semiconductor materials
Nice to have: long-term technology development

Skills

semiconductor device engineering materials integration process integration data analytics statistical problem-solving

Benefits

medical, dental and vision plans
benefit programs that help protect income if unable to work due to illness or injury
paid family leave
robust paid time-off program
paid holidays

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Staff Engineer, Survivability

f7d8749a-72d6-407c-bf98-292ea630c73a · Posted Oct 14, 2026

Seattle, Washington, United States
Full-time · Senior
7+ years

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Lead Survivability Engineer to shape and optimize low observable performance of next‑generation autonomous aircraft.

Compensation

Pay within range listed + Bonus + Benefits + Equity

Responsibilities

Design and optimize low observable features across the airframe focusing on shaping, edge treatments, radar‑absorbing materials, and subsystem integration.
Conduct modeling and simulation of electromagnetic signatures using industry‑standard tools such as HFSS, CST Studio Suite, Xpatch, and SENTRi.
Work with multidisciplinary teams in propulsion, avionics, structures, and AI to ensure survivability is baked into the system architecture from day one.
Lead or support signature testing efforts, including indoor and outdoor RCS range tests, validation campaigns, and supplier‑level hardware evaluations.
Translate mission threats and requirements into survivability features that address RCS, thermal, visual, and acoustic observability constraints.

Requirements

B.S. or M.S. in Aerospace Engineering
B.S. or M.S. in Electrical Engineering
B.S. or M.S. in Physics
Nice to have: military UAV platforms
Nice to have: 5th‑gen fighter programs

Skills

radar cross‑section shaping

low observable materials

electromagnetic signature modeling

CST Studio Suite

RCS shaping principles

edge treatments

cavity suppression

materials integration

LO testing methods

RCS measurement equipment

radar‑absorbing materials

structural LO trade studies

Benefits

Benefits package
Equity
Bonus

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