- Markham, Ontario, Canada
IP Validation Design Engineer responsible for planning, validating, debugging and improving AMD IP for SOC programs.
Responsibilities
- Drive planning, validation, and debug of hardware IP for AMD APU, CPU, Compute and Discrete Graphics SOC programs
- Comprehend SOC as a complete system and ensure firmware, BIOS and software alignment
- Work cross-functionally with IP/Domain architects to assess technical issues and develop solutions
- Define, document, execute and report functional test plans and validation strategies
- Drive technical innovation in IP validation tools and automation
Requirements
- Bachelor’s or Master’s degree majoring in EE, CS or related field