- Israel
- On-site
- Senior
- 5+ years
Lead end-to-end pre-silicon verification of CPU/SOC memory subsystems across multiple geographies.
Responsibilities
- Establish DV methodology and test-plan development
- Develop verification environments, stimulus, checkers, and test benches
- Debug and achieve coverage goals for RTL freeze and tape-out
- Create synthesizable transactors and verification hooks
- Write unit-level stimulus and full-chip C programs
Requirements
- Nice to have: team player
- Nice to have: excellent communication
- Nice to have: independent work
- Nice to have: emulation
- Nice to have: synthesizable transactors