- Santa Clara, California, United States +2 more
- On-site
- Full-time · Entry
- $106K–$149K per year
- 0–1 years
Design and implement logic for SoC blocks and subsystems using RTL coding techniques, integrate IP blocks, conduct quality checks, optimize designs, review verification plans, collaborate with IP providers, follow secure development practices, and drive compliance with quality assurance standards.
Locations (3)
- Santa Clara, California, United States
- Folsom, California, United States
- Hillsboro, Oregon, United States
Compensation
Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD
Responsibilities
- Design and implement logic for SoC blocks and subsystems using register transfer level (RTL) coding techniques.
- Integrate IP blocks and subsystems into full chip SoC designs, ensuring seamless functionality.
- Conduct quality checks across various aspects of logic design, from RTL coding to timing, power, and area convergence.