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Verification Engineer 3

Sunrise BizTech Systems · Posted Nov 11, 2026

Hyderabad, Telangana, India
Hybrid
Full-time · Mid

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System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip (NOC) protocol. Experience in multi-master, multi-slave AXI4 use-case configurations. Knowledge of DRAM memory controllers. Develop and execute testbenches to validate the functionality and correctness of models, as well as participate in system-level testing and debugging.

Responsibilities

Setup verification environment and bring up simulations with various simulations such as VCS / Questa / Xcellium / Riviera
SV/UVM Functional verification
Expertise in Vivado for simulation debugs

Skills

System Verilog UVM AXI4 bus protocol Network On Chip (NOC) protocol DRAM memory controllers VCS Questa Xcellium Riviera Vivado

AXI4 bus protocol jobs

Responsibilities

Skills

Responsibilities

Skills