- Sunnyvale, California, United States
- On-site
- Full-time · Lead
- 6+ years
Define data parallel microarchitecture satisfying ISA constraints and drive architecture tradeoff analysis for performance, power, area, bandwidth, latency, and scalability.
Responsibilities
- Define data parallel microarchitecture satisfying ISA constraints
- Drive architecture tradeoff analysis for performance, power, area, bandwidth, latency, and scalability
- Develop and review system architecture specifications, interface definitions, and microarchitecture requirements
- Collaborate with RTL, verification, physical design, firmware, software, and system teams throughout the development cycle
- Lead performance modeling, workload analysis, and bottleneck identification using C/C++/SystemC or similar modeling environments
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field