- Pune, Maharashtra, India
- Senior
- 2+ years
Senior Engineer in Silicon Design Validation for FPGA building blocks at Lattice Semiconductor.
Responsibilities
- Validate and characterize various IPs from silicon arrival to release to production
- Develop validation and characterization plans for certain IPs, bench hardware and software
- Develop test logic RTL to achieve intended validation/characterization test
- Drive new silicon product bring-up, validation, debug to assess IP functionality/performance
- Serve as the central resource with design, verification, manufacturing, test, quality and marketing/apps as the product moves
Requirements
- Electrical Engineering degree