Staff Silicon Validation Engineer New
Lattice Semiconductor · San Jose, US $221K–$221K
Senior Design Engineer(FPGA RTL) New
Lattice Semiconductor · Hyderabad, IndiaSenior
Senior Engineer, Post Silicon Validation New
Lattice Semiconductor · Pune, IndiaSenior
Silicon Validation Engineer New
Lattice Semiconductor · Pune, India
Staff Engineer - Post Siiicon Validation New
Lattice Semiconductor · Pune, IndiaFull-time · Staff
Senior Manager, Post-Silicon Validation Engineering New
Lattice Semiconductor · Pune, IndiaManager
Senior Design Engineer - Post Silicon Validation New
Lattice Semiconductor · Pune, IndiaSenior
Design Eng 4 New
Lattice Semiconductor · Pune, India
Senior Design Verification Engineer New
Lattice Semiconductor · Manila, PhilippinesSenior
Sr Staff Design Engineer New
Lattice Semiconductor · Pune, IndiaFull-time · Senior
+10K new in the last hour
Lattice Semiconductor · Posted Sep 22, 2026
San Jose, California, United States $221K–$221K per year 8+ years
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Lead validation and characterization of silicon IPs for FPGA products, driving new silicon product bring‑up, debugging, and customer issue resolution.
Validate and characterize various IPs from silicon arrival to release to production Develop validation and characterization plans for certain IPs Develop test logic RTL to achieve intended validation/characterization test Drive new silicon product bring‑up, validation, debug to assess IP functionality/performance Analyze measured data with statistical view Electrical Engineering degree healthcare retirement plans paid time off Lattice Semiconductor · Posted Sep 10, 2026
Hyderabad, Telangana, India Senior 5+ yearsSenior IP Design engineer with extensive FPGA RTL design experience
Design FPGA RTL logic Verify logic and perform timing closure Debug hardware and validate designs Package soft IP and develop testbenches BS/MS/PhD in Electronics or Computer Engineering Nice to have: Hardware validation and debug Nice to have: Soft IP packaging Nice to have: Example design Nice to have: Testbench development Lattice Semiconductor · Posted Sep 4, 2026
Pune, Maharashtra, India Senior 2+ yearsSenior Engineer, Post Silicon Validation
Validate and characterize various IPs from silicon arrival to release to production Develop validation and characterization plans for certain IP, bench hardware and software Develop test logic RTL to achieve intended validation/characterization test Drive new silicon product bring-up, validation, debug to assess IP functionality/performance Serve as the central resource with design, verification, manufacturing, test, quality and marketing/apps as the product(s) move Silicon arrival to product release Electrical Engineering degree Lattice Semiconductor · Posted Sep 4, 2026
Pune, Maharashtra, India 2+ yearsValidate and characterize silicon IPs on FPGA boards, develop test plans, and support product release.
Validate and characterize various IPs from silicon arrival to release to production Develop validation and characterization plans for certain IPs, bench hardware and software Develop test logic RTL to achieve intended validation/characterization test Drive new silicon product bring‑up, validation, debug to assess IP functionality/performance Serve as central resource with design, verification, manufacturing, test, quality and marketing/apps as product moves Electrical Engineering degree Lattice Semiconductor · Posted Sep 4, 2026
Pune, Maharashtra, India Full-time · Staff 8+ yearsThe ideal candidate is highly motivated in deoping a career in Silicon Design Validation engineering. The role involves validating and characterizing IPs from silicon arrival to production, and driving new silicon product bring-up.
Validate and characterize various IPs from silicon arrival to release to production Develop validation and characterization plans for certain IP, bench hardware and software Develop test logic RTL to achieve intended validation/characterization test Drive new silicon product bring-up, validation, debug to assess IP functionality/performance Characterizing data sheet parameters Electrical Engineering degree Nice to have: FPGA (emulation/prototyping) Lattice Semiconductor · Posted Sep 4, 2026
Pune, Maharashtra, India Manager 15+ yearsLead a team focused on ensuring the quality and performance of advanced semiconductor products across the post‑silicon lifecycle.
Lead a highly motivated team focused on ensuring the quality and performance of advanced semiconductor products Provide strategic oversight and technical direction across the full post‑silicon lifecycle Foster a learning environment for engineers working with FPGA architectures and foundational IP blocks Oversee validation and characterization of analog, digital, and mixed‑signal IPs Guide development of validation plans and ensure necessary tools and infrastructure Master or Bachelor’s degree in Electrical Engineering Lattice Semiconductor · Posted Sep 1, 2026
Pune, Maharashtra, India Senior 5+ yearsLead validation of silicon building blocks for FPGA products
Validate and characterize IPs from silicon arrival to release Develop validation and characterization plans Develop test logic RTL Drive new silicon product bring‑up and debug Analyze measured data with statistical tools Electrical Engineering degree Lattice Semiconductor · Posted Jul 17, 2026
Pune, Maharashtra, India 8+ yearsSenior Silicon Design Validation Engineer
Validate and characterize silicon IPs from arrival to production Develop validation and characterization plans and test logic RTL Drive new silicon product bring‑up and debug Analyze measured data and prepare datasheets Serve as central resource across design, verification, manufacturing, test, quality and marketing Electrical Engineering degree Lattice Semiconductor · Posted Jun 16, 2026
Manila, Philippines Senior 6–10 yearsLead design verification for programmable logic solutions, developing comprehensive verification plans, testbenches, and regression environments.
Develop comprehensive verification plans and metrics Verify design blocks, subsystems and full chip using assertion-based, formal, directed and randomized tests Develop System Verilog and C based testbenches in UVM environment Design and develop testbench components such as Universal Verification Components, BFMs and verification tools Define and design verification regression environment Bachelor's or Masters Degree in Computer Science Bachelor's or Masters Degree in Computer Engineering Bachelor's or Masters Degree in Electronics Bachelor's or Masters Degree in Electrical Engineering Lattice Semiconductor · Posted May 13, 2026
Pune, Maharashtra, India Full-time · Senior 12+ yearsServe as a key contributor to FPGA design efforts Drive physical design closure of key ASIC blocks & full chip and bring best-in-class methodologies to achieve best power, performance, and area Ensuring design quality through all physical design quality checks and signoff Develop strong relationships with worldwide teams Mentor and develop strong partners and colleagues BS in Electronics Engineering MS in Electronics Engineering PhD in Electronics Engineering BS in Electrical Engineering MS in Electrical Engineering
Comprehensive compensation and benefits program