- San Jose, California, United States
- Full-time · Senior
- $149K–$282K per year
- 2+ years
1–2 jobs· newest first

$149K–$282KFull-time · Senior
On-site · Full-time · Mid
+10K new in the last hour
As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII implementation flow for advanced semiconductor nodes. You will optimize floor planning and timing, analyze and improve backend design flows, and collaborate across teams to ensure the successful delivery of high-performance networking chips.
The starting salary range posted for this position is $167,700.00 to $245,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.
Mindlance · Posted Nov 11, 2026
Client is looking for experienced Core Physical Design Engineers to work on advanced ASIC and SoC designs.