Own transmitter and receiver characterization and compliance testing for SerDes interfaces across next-generation compute and networking platforms.
Lead the development of advanced RX test methodologies, including jitter tolerance, stressed receiver sensitivity, bit error rate, and complex inter symbol interference channel testing.
Interpret and map industry standards (IEEE 802.3, OIF-CEI) into rigorous, automated receiver test plans.
Master and deploy high-bandwidth lab instrumentation, including high-speed arbitrary waveform generators, bit error rate testers, real-time oscilloscopes, and vector network analyzers.
Collaborate closely with ASIC PHY design, silicon design and validation, and signal integrity teams to root-cause link performance anomalies and optimize TX and RX equalizer and DSP parameters.
Solve signal integrity challenges. Enable high-speed systems. Deliver enterprise-class networking.
Locations (2)
Sunnyvale, California, United States
Roseville, California, United States
Compensation
– United States of America: Annual Salary USD 109,500 - 220,500 in California
Responsibilities
Support the design and validation of signal and power integrity solutions for system-level high-speed interfaces, power distribution networks (PDN), high-precision timing, and general-purpose I/O.
Develop robust, cost-effective SI/PI solutions through analysis, simulation, design-of-experiments, and lab correlation using modern tools and methodologies.
Perform interconnect and PDN modelling, SI/PI simulations, and analysis to help ensure designs meet performance, reliability, and industry specifications.
Contribute to PCB stack-ups, design rules, and constraints, and participate in design reviews to ensure compliance with SI/PI best practices and standards.
Conduct lab measurements and correlate results with simulations using advanced lab instrumentation.
Requirements
Bachelor’s or Master’s degree in Electrical or Electronics Engineering
Staff SerDes Characterization Engineer, PlatformsGoogle · Sunnyvale, US