Revision control systems jobs

ASIC/FPGA Verification Engineer

Boeing · Posted Nov 10, 2026

Open

El Segundo, California, United States +1 more
On-site
Full-time · Associate
$86K–$171K per year
5+ years

ASIC/FPGA Verification Engineer

Boeing · Posted Nov 10, 2026

Open

El Segundo, California, United States +1 more
On-site
Full-time · Associate
$86K–$171K per year
5+ years

System Level Debug Staff Engineer

Advanced Micro Devices, Inc · Posted Nov 10, 2026

Open

Penang, Pulau Pinang, Malaysia
7+ years

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Lead system-level debugging and validation for AMD graphics platforms, collaborating with cross-functional teams globally to ensure product quality and milestone delivery.

Responsibilities

Engage in AMD dGPU post-silicon phases, reviewing internal and customer designs
Develop validation strategies and test plans for reference or customer platform designs
Create test procedures and generate technical documents
Execute post-silicon integration validation and report status
Triage and debug system-level issues with cross-functional engineering teams

Requirements

Bachelor+ Sc. or above in EE or CS related Engineering
Nice to have: Graphics experience
Nice to have: Project management

Skills

PC hardware elements (CPU, GPU chipset, I/O devices)Software BIOS Drivers Operating System Electrical hardware design ASIC platform test and debug

ASIC Design Verification Engineer, Google TPU

Google · Posted Nov 5, 2026

Open

Sunnyvale, California, United States
On-site
Full-time · Mid
$138K–$197K per year
4+ years

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ASIC Design Verification Engineer focused on TPU architecture and integration within AI/ML systems

Compensation

US: $138000 - $197000 (USD) + 15% bonus target + equity + benefits

Responsibilities

Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Identify and write all types of coverage measures for stimulus and corner cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Create a constrained-random verification environment using SystemVerilog and UVM.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Nice to have: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science
Nice to have: 6 years of experience with silicon design verification

Skills

design verification SystemVerilog Verilog

Associate Wireless Security Engineer

The Mitre Corporation · Posted Oct 8, 2026

Open

Bedford, Massachusetts, United States
Full-time · Associate
$89K–$134K per year
0+ years

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Develop and apply technical expertise to research, develop, and countermeasure emerging security threats to wireless systems, design prototypes, perform assessments, and develop software for lab equipment.

Compensation

Salary compensation range and midpoint: $89,200 - $111,500 - $133,800 Annual

Responsibilities

Research and develop new approaches and countermeasures for emerging security threats to wireless systems
Design and build prototypes to demonstrate advanced capabilities
Perform hands‑on functional and security assessments of wireless systems and implementations
Develop software for interfacing with and controlling lab equipment for data collection, measurement, and analysis
Work as part of a multi‑disciplinary team of engineers

Requirements

BS degree in Electrical or Computer Engineering, Computer Science, or similar field
Nice to have: MS or PhD degree in Electrical or Computer Engineering, Computer Science, or similar field
Nice to have: software development practices including design and code reviews, testing and regression, revision control, and user documentation
Nice to have: software‑defined radio usage
Nice to have: networking and/or wireless communications protocol stack(s)

Skills

Python

Senior AI Engineer

Camgian Corporation · Posted Nov 4, 2026

Open

Huntsville, Alabama, United States
Senior
5+ years

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Lead the design, development, and testing of AI/ML prototypes for space and missile defense, mentor junior engineers, and drive research and proposal activities.

Responsibilities

Conduct research and development of novel AI/ML concepts, algorithms, and techniques
Lead the design, development, and testing of scalable AI/ML software prototypes
Interface with customers and stakeholders to gather mission requirements
Mentor and guide junior engineers
Track project milestones and budgets

Requirements

Bachelor’s degree in aerospace engineering, electrical engineering, computer science, computer engineering, statistics, applied mathematics, or a related field
Nice to have: Master’s or PhD in aerospace engineering, electrical engineering, computer science, computer engineering, statistics, applied mathematics, or a related field
Nice to have: AI frameworks (TensorFlow, PyTorch, scikit‑learn, OpenCV)
Nice to have: NumPy, SciPy, Pandas, Matplotlib
Nice to have: cloud environments (AWS, Azure)

Skills

Python AI/ML model validation deployment algorithm development

ASIC/FPGA Verification Engineer

ASIC/FPGA Verification Engineer

Locations (2)

Compensation

Responsibilities

Requirements

Skills

Benefits

System Level Debug Staff Engineer

Responsibilities

Requirements

Skills

ASIC Design Verification Engineer, Google TPU

Compensation

Responsibilities

Requirements

Skills

Associate Wireless Security Engineer

Compensation

Responsibilities

Requirements

Skills

Senior AI Engineer

Responsibilities

Requirements

Skills

Benefits

Benefits