- Sunnyvale, California, United States
- On-site
- Full-time · Senior
- $163K–$236K per year
- 8–10 years
Work to shape the future of AI/ML hardware acceleration, driving TPU technology for Google's most demanding AI/ML applications, and verifying complex digital designs focused on TPU architecture within AI/ML-driven systems.
Compensation
US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
Responsibilities
- Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios
- Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry-leading formal tools
- Identify and write all types of coverage measures for stimulus and corner cases
- Debug tests with design engineers to deliver functionally correct design blocks
- Close coverage measures to identify verification holes and to show progress towards tape-out
Requirements
- Bachelor's degree in Electrical Engineering
- Bachelor's degree in Computer Engineering
- Bachelor's degree in Computer Science
- Master's degree in Electrical Engineering
- Master's degree in Computer Engineering