Formal testbench development jobs

Senior Verification Engineer

BLUE ORIGIN · Posted Nov 3, 2026

Kraków, Małopolska, Poland
On-site
Full-time · Senior
5+ years

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The Senior Verification Engineer on the ASIC & Networking team supports TeraWave's first in-house silicon program, which comprises a high-throughput modem and a DSP-intensive digital beamformer. The role involves defining verification strategy, methodology, and infrastructure.

Responsibilities

Own verification planning and execution for complex blocks and subsystems, from test plan through sign-off.
Translate design specifications into verification strategies, measurable coverage goals, and early identification of high-risk scenarios.
Select verification methods for each problem, including constrained-random simulation, formal analysis, and directed testing.
Develop verification environments, reference models, scoreboards, protocol monitors, coverage components, and assertions.
Drive functional coverage closure, regression health, and sign-off readiness across simulation and formal results.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
Nice to have: space-based communications
Nice to have: wireless communications
Nice to have: modem
Nice to have: baseband

Skills

ASIC functional verification SoC functional verification

Senior ASIC Design Verification Engineer - Terawave

Senior ASIC Design Verification Engineer - Terawave

Compensation

Responsibilities

Requirements

Skills

Benefits

Senior Verification Engineer

Responsibilities

Requirements

Skills