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1–2 jobs· newest first

Engineering Lead
HSBC · Guangzhou, China
Hybrid · Full-time · Lead
FY27 Micron Korea Overseas Experience Hiring_Japan
Micron Technology · Tokyo, Japan
Full-time · Principal

+10K new in the last hour

Engineering Lead

HSBC · Posted Nov 9, 2026

Guangzhou, Guangdong, China
Hybrid
Full-time · Lead
8+ years

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FY27 Micron Korea Overseas Experience Hiring_Japan

Micron Technology · Posted Nov 6, 2026

Tokyo, Tokyo, Japan
Full-time · Principal
8+ years

Apply with Referso

AI

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Lead overall architecture design and core capability development for an AI Agent platform, including task orchestration, tool invocation, context management, memory mechanisms, and multi-agent collaboration.

Responsibilities

Platform architecture & core capability design for an AI Agent platform
Embed AI-native capabilities into engineering workflows such as AI coding, technical solution generation, test case generation, and automated environment setup/orchestration
Design, integrate, and apply enterprise knowledge enhancement capabilities including RAG, GraphRAG, and knowledge graphs
Establish AI agent runtime and governance frameworks including isolation, sandboxing, access control, auditability, quality measurement, stability, reliability, and cost management
Partner with Product, Engineering, QA, Operations, and platform teams to standardise and productionise platform capabilities

Requirements

Bachelor’s degree or above
Computer Science
Software Engineering
AI
Nice to have: RAG

Skills

backend/platform engineering architecture Java Python LLMs agent architectures Task decomposition & planning Tool use / function calling patterns Context and session management Memory design Execution loops and exception handling LangChain LangGraph Claude Code Codex Cursor Copilot Kubernetes

Benefits

continuous professional development
flexible working
opportunities to grow

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AI

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Micron is looking for experienced semiconductor design professionals for their advanced memory design and engineering teams through the Cross-Country Korea Hiring initiative.

Responsibilities

Lead advanced circuit and physical design for high-speed memory datapaths, including HSIO, SerDes, Rx/Tx, DDR/LPDDR, NAND/DRAM PHY, timing optimization, and silicon correlation.
Drive advanced memory interface design for next-generation memory architectures, with focus on TSV, HBM, Wide I/O, high-speed memory interfaces, inter-die timing, power optimization, and 3D-stacked memory technologies.
Own complex designs and work across multiple engineering teams.
Communicate technical trade-offs, progress, and outcomes effectively.

Requirements

BS or MS in Electrical Engineering or a related discipline
Nice to have: AI-assisted tools

Skills

semiconductor circuit design memory design analog/mixed-signal high-speed interface memory datapath PHY physical circuit design NAND DRAM DDR/LPDDR HBM TSV Wide I/O simulation timing analysis signal integrity physical design silicon/debug

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