RTL Design Engineer to help design and develop next-generation AI accelerator silicon, working across architecture, microarchitecture, and RTL implementation.
Responsibilities
Design and implement high-performance RTL for next-generation AI accelerator silicon, from microarchitecture definition through implementation and integration.
Collaborate with architecture and software teams to translate system-level requirements into efficient hardware microarchitectures.
Drive hardware/software co-design efforts to optimize performance, power, area, and scalability for AI workloads.
Develop and optimize RTL for complex datapaths, control logic, interconnects, and other critical silicon subsystems.
Evaluate architectural and microarchitectural tradeoffs across bandwidth, latency, throughput, and resource utilization.
Perform semiconductor engineering research, design, development, and/or testing for firm products and/or devices for use in the electronic communication industry.
Locations (2)
San Jose, California, United States
Austin, Texas, United States
Compensation
The base pay range for this role is between $160,197.00 - $208,440.00.
Responsibilities
Perform semiconductor engineering research, design, development, and/or testing for firm products and/or devices for use in the electronic communication industry.
Design and document major units in a GPU pipeline targeted at mobile graphics and machine learning.
Drive and develop the functional and cycle simulators for GPU pipeline.
Collect statistics to evaluate potential benefit of optimizations, prototype to test functional correctness and specify the scheme in detail for next level of implementation in hardware and/or software.
Collaborate with implementation, modeling, and software teams to define and develop microarchitecture, software implementation, and/or a verification plan.
Requirements
Master’s degree in Computer Engineering
Master’s degree in Electrical Engineering
Nice to have: Graduate level course in high performance processors
Nice to have: Research project in quantitative analysis of computing systems
Nice to have: Internship involving machine learning approaches
