Contribute to CPU frontend design, emphasizing on microarchitecture and RTL design for a next generation CPU.
Propose performance enhancing microarchitecture features with efficiency in mind. Work with architects and performance teams for trade-off studies. Communicate pros and cons of microarchitecture proposals. Facilitate final decision making by gathering necessary data and present to the larger team.
Deliver designs meeting power, performance and area (PPA) goals with production quality. Become familiar with state-of-the-art techniques for memory subsystem design.
Leverage design understanding in order to provide guidance to, and participate in, the performance modeling effort.
Work closely with the functional verification team to ensure production quality designs, and with the physical design team to meet frequency, power, and area goals.
Requirements
Bachelor's degree in Electrical Engineering, Computer Science, or a related field, or equivalent practical experience.
Nice to have: Master’s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science
Contribute to all phases of complex designs of CPU subsystems from design specification to productization, including quality assurance and integration into target System on a chip (SoC).
Locations (2)
New Taipei, New Taipei City, Taiwan
Zhubei, Hsinchu County, Taiwan
Responsibilities
Participate in developing CPU or AI accelerator design and deliveries into SoC.
Develop CPU subsystem front-end designs, emphasizing on microarchitecture and RTL design for the next generation CPU.
Deliver designs that meet PPA and functional goals with modern techniques, interpret the techniques into design constructs, and languages in order to participate in SoC integration effort.
Work closely with the functional verification team to ensure production quality designs, and with the physical design team to meet frequency, power, and area goals.
Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
CPU RTL Design EngineerNewGoogle · Mountain View, US+2 more