Lead a globally distributed engineering organization spanning design, verification, physical design, DFT, and silicon validation across multiple sites to deliver advanced connectivity silicon products.
Locations (8)
Santa Clara, California, United States
Irvine, California, United States
Ottawa, Ontario, Canada
Pavia, Lombardy, Italy
Aachen, North Rhine-Westphalia, Germany
Bucharest, Ilfov, Romania
Show all 8 locations
Vietnam
India
Compensation
Expected Base Pay Range (USD) 242,080 - 362,600, $ per annum
Responsibilities
Lead a globally distributed engineering organization spanning design, verification, physical design, DFT, and silicon validation across sites including Irvine, Santa Clara, Ottawa, Pavia, Aachen, Bucharest, Vietnam, and India
Own end-to-end execution of one or more major product families — from RTL design through tape-out, bringup, and production release
Drive first-silicon success across next-generation 200G/lane and beyond connectivity products on 3nm and 2nm process nodes
Establish and continuously improve design flows, verification methodologies, DFT strategies, and emulation infrastructure to accelerate delivery and quality
Partner with architecture, systems, and product management teams to define the technical roadmap for next-generation connectivity products
Requirements
BS/MS/PhD in Electrical Engineering, Computer Engineering, or related field