- Santa Clara, California, United States
- Senior
- $320K–$489K per year
- 15+ years
Lead the development and execution of corporate-level strategies for high-speed signaling technologies across advanced semiconductor packaging, sockets, and connectors.
Compensation
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 320,000 USD – 488,750 USD.
Responsibilities
- Lead the development and execution of corporate-level strategies for high-speed signaling technologies across advanced semiconductor packaging, sockets, and connectors.
- Oversee technical direction and implementation for next-gen products ranging from ultra-mobile to high-performance AI and HPC platforms.
- Architect and deliver state-of-the-art interconnect and packaging solutions for standards such as UCIe, HBM, DDR, PCIe, and industry-leading SerDes (224G/448G).
- Enable advanced packaging technology solutions for co-packaged optics, stacked die, chiplet-based architectures and IVR solutions.
- Development of modeling and characterization flows, flow automations, design for high volume manufacturing techniques.
Requirements
- MS/PhD in Electrical Engineering