Referso Jobs

ASIC/FPGA Verification Engineer

Boeing · Posted Nov 10, 2026

Open

El Segundo, California, United States +1 more
On-site
Full-time · Associate
$86K–$171K per year
5+ years

ASIC/FPGA Verification Engineer

Boeing · Posted Nov 10, 2026

Open

El Segundo, California, United States +1 more
On-site
Full-time · Associate
$86K–$171K per year
5+ years

Design Verification Engineer

Cystems Logic Inc · Posted Nov 9, 2026

Open

Sunnyvale, California, United States
Contract · Mid

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Develop and execute verification environments for complex semiconductor designs using SystemVerilog and UVM.

Responsibilities

Develop and maintain reusable UVM-based verification environments
Create and implement test plans, test scenarios, and verification strategies
Develop constrained-random and directed test cases using SystemVerilog
Build and maintain UVM components, including agents, drivers, monitors, sequencers, and scoreboards
Develop assertions using SystemVerilog Assertions (SVA)

Skills

UVM SystemVerilog SystemVerilog Assertions (SVA)UVM sequences UVM sequencers UVM drivers UVM monitors UVM agents UVM scoreboards constrained-random verification

CR3210-Baseband硬體工程師

WNC Corporation · Posted Nov 9, 2026

Open

Hsinchu, Taiwan, Taiwan

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Baseband hardware engineer responsible for system integration, validation, and production support in wireless broadband communications.

Responsibilities

Integrate and validate baseband platforms, 5G-RAN transport, RF data, and sync interfaces
Board bring-up through system testing and release verification
Bring-up and design application-layer functions and control-message functionalities
Prototype bring-up and validation of RF/AFE, JESD, SPI, I2C and CAN interfaces
Review schematics and pin assignments and investigate initialization and clock synchronization issues

Skills

Algorithm Analysis Algorithmic Design Application Development Baseband Build Process Circuit Designs Code Coverage Code Refactoring Computer Architecture Debugging Digital Architecture Digital Logics Digital Signal Processing (DSP)Electronic Systems Embedded Operating Systems

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Software Engineering Technical Lead

Trintech · Posted Oct 15, 2026

Open

Bangalore, India
8+ years

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Lead technical design and development of full‑stack enterprise SaaS applications in a global engineering team.

Responsibilities

Design, develop, test, and maintain full stack enterprise SaaS applications using Java, Spring/Spring Boot, REST APIs, Angular, JavaScript/TypeScript, and SQL Server/Oracle.
Lead technical design, code reviews, implementation approach, and engineering standards within the development team.
Build, test, and deliver complex frameworks, services, UI components, and application features while diagnosing and resolving complex product issues.
Drive clean code, reusable design, SOLID principles, design patterns, secure coding, automated unit testing, and maintainable architecture.
Ensure code quality and compliance using tools and practices such as Sonar, Dependency Track, peer reviews, unit testing, and code coverage guidelines.

Requirements

Bachelor’s degree in Computer Science, Software Engineering, or a related field, or equivalent practical experience.
Nice to have: AI‑enabled software development practices
Nice to have: effective prompting
Nice to have: code generation
Nice to have: test generation

Skills

Java Spring/Spring Boot

System Analyst III

SimVentions, Inc · Posted Nov 6, 2026

Open

Patuxent River, Maryland, United States
On-site
Full-time · Senior
$100K–$140K per year

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Review and analyze OEM-developed software documentation, code, and test reports to ensure compliance with security and quality standards.

Compensation

The projected annual compensation range for this position is $100,000 - $140,000 (USD).

Responsibilities

Review all aspects of OEM-developed software including source code, repository structures, and related technical deliverables
Review contractor-submitted Contract Data Requirements Lists (CDRLs) including SVDs, SDPs, SDDs, and test execution reports
Review outputs from Static Application Security Testing (SAST) and Software Composition Analysis (SCA) tools for critical vulnerabilities and adherence to coding standards
Evaluate dynamic code analysis results, memory management metrics, and automated unit, integration, and regression test suites
Review structural code coverage reports to assess metrics, ensuring thorough validation of avionics systems before deployment

Requirements

BS/BA degree in Computer Science or Engineering field from an ABET accredited college program
Nice to have: Strong interpersonal skills
Nice to have: Presentation skills
Nice to have: Experience delivering presentations to executives and senior management

Skills

Lead Digital Verification Engineer

Cadence Design Systems · Posted Nov 5, 2026

Open

Montreal, Quebec, Canada +2 more
CA$90K–CA$166K per year

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Lead Digital Verification Engineer responsible for verification of digital RTL, development of reusable verification components and environments, flow development, test plan execution, coverage closure, and collaboration across design and verification teams.

Locations (3)

Montreal, Quebec, Canada
Ottawa, Quebec, Canada
Toronto, Quebec, Canada

Compensation

The annual salary range for MOUNT-ROYAL 01 (Montreal)is 89,600.00 - 166,400.00 CAD Annual CAD Annual. You may also be eligible to receive incentive compensation: bonus, equity, and benefits.

Responsibilities

Verify digital RTL modules
Develop reusable verification components and environments
Develop and execute test plans
Achieve functional and code coverage closure
Collaborate with design, verification, project management, and digital/analog teams

Design Verification

Apple · Posted Nov 5, 2026

Open

Austin, Texas, United States
On-site
Full-time · Mid
5+ years

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Create software to verify architecture and functionality of pre-silicon hardware designs.

Responsibilities

Create software to verify architecture and functionality of pre-silicon hardware designs
Program in object-oriented programming, C, C++, System Verilog, Python, and Perl
Run regressions, performing bug tracking, and analyzing code and functional coverage
Simulate and debug Register Transfer Level (RTL)
Collaborate with all fields (vertical product model)

Requirements

Master's Degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or related field

Skills

System Verilog UVM Python Perl C C++NCSIM Xcelium Assertions

Principal Quality Assurance Engineer

PTC · Posted Nov 5, 2026

Open

Pune, Maharashtra, India
8–12 years

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Designs, modifies, develops, writes and implements software programming applications and performs root cause analysis for complex system issues.

Responsibilities

Designs, modifies, develops, writes and implements software programming applications
Performs root cause analysis and develops long-term solutions
Manages infrastructure and mentors junior staff
Works directly with customers/partners to resolve bugs
Writes code coverage tests such as JUnit

Skills

Core Java Rest APIs JSP AngularJS JQuery JavaScript Ag-Grid Oracle MSSQL database code coverage JUnit

Lead, FPGA Firmware Verification Engineer

L3HHCM20 · Posted Nov 4, 2026

Open

Alpharetta, Georgia, United States
On-site
Full-time · Lead
9+ years

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Provide provide technical leadership and execute FPGA verification activities for mission-critical aerospace and defense products, including simulation development, regression execution, hardware integration, and laboratory testing supporting DO-254 compliance.

Responsibilities

Provide hands-on technical leadership for FPGA verification, including verification planning, testbench development, simulation, regression testing, hardware testing, and results analysis.
Develop, maintain, and execute verification environments using VHDL, Verilog, SystemVerilog, Universal Verification Methodology (UVM), and assertion-based verification.
Review requirements for clarity, completeness, and verifiability; develop requirements-based verification procedures and maintain traceability between requirements, tests, and results.
Support DO-254 verification activities, including preparation and review of verification plans, procedures, results, coverage analyses, and supporting lifecycle documentation.
Develop and enhance scalable simulation environments, automated regressions, and scripting infrastructure to improve verification efficiency and repeatability.

Requirements

Bachelor’s degree
graduate degree
Nice to have: airworthiness certification
Nice to have: MIL-HDBK-516C
Nice to have: AC 17-01

Skills

FPGA design

Code Coverage jobs

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