Arch Insurance Group Inc. · Jersey City, US+1 more
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Provide hands‑on experience in the insurance industry, developing professional skills and contributing to projects as part of Arch’s summer internship program.
Locations (2)
Jersey City, New Jersey, United States
Hartford, Connecticut, United States
Compensation
For individuals assigned to or hired to work in Jersey City, NJ or Hartford, CT the hourly rate is $24-28 as of the time of posting. $26 per hour for Jersey City; $24 per hour for Hartford
Responsibilities
Gain relevant expertise in various aspects of the insurance field
Develop through learning activities and ongoing feedback
Collaborate with senior team members
Identify talent for full‑time opportunities
Requirements
Bachelor’s or graduate degree in Computer Science, Information Technology, Data Science or related field
Nice to have: Snowflake
Nice to have: Power BI
Skills
Electrical & Computer Engineering Academic Part Time Intern
Academic Part Time Intern supporting GNSS, Radiometric & Gravity Sensing Instruments Group in JPL’s Flight Communications and Tracking Section
Compensation
The typical hourly rate for this job in Pasadena, California depending on education level (undergrad) is $21.00 as a freshman, $22.50 as a sophomore, $24.50 as a junior, and $26.50 as a Senior
Responsibilities
Designing, building and testing of PCB (printed circuit boards).
Using Test Equipment to troubleshoot, characterize and validate circuit designs.
Working on a multi-disciplinary team to create instruments for space flight.
Assisting engineers and scientists in a laboratory environment.
Support Lab activities including setting up tests, lab equipment and programming embedded systems.
Requirements
Bachelor's in Electrical Engineering
Master's in Electrical Engineering
PhD in Electrical Engineering
Nice to have: Familiarity with electronics engineering
Support the validation, qualification, and integration of compact semiconductor models into production Process Design Kits (PDKs) and develop automated workflows for model qualification and release management.
Responsibilities
Support the validation, qualification, and integration of compact semiconductor models into production Process Design Kits (PDKs)
Perform systematic quality assurance and qualification of compact models prior to production release
Validate electrical model behavior across process corners, voltage ranges, temperature conditions, device geometries, and operating regions
Develop and maintain regression test suites covering DC, AC, transient, noise, and other relevant simulation analyses
Identify model discontinuities, convergence issues, numerical instabilities, and non-physical behavior, and support their resolution
Intern to support image-processing and calibration/validation activities for Earth-observation missions, developing engineering prototypes and evaluating AI/ML methods.
Compensation
Gratification: €1,300 gross/month.
Responsibilities
Review DSNU, radiometric calibration, and relevant EVP processing and CAL/VAL practices.
Work with EVP engineers to identify suitable routine images, metadata, and reference calibration data; document data limitations and provenance.
Prepare a reproducible dataset and establish reference baselines, including a holdout evaluation strategy that avoids tuning and testing on the same acquisitions.
Implement a baseline estimator: a data-fit term combined with a regularizing prior.
Investigate additional AI/ML methods only where suitable training or validation data are available; compare them against the baseline rather than assuming they are superior.
Requirements
Student in engineering, applied physics, remote sensing, image processing, data science, or a related field
Stage 2027 Optimisation des performances au décollage : analyse des bases de données d'obstacles et des pratiques opérationnelles des compagnies aériennes à partir de données en exploitation (F/H)
Support validation, testing, and failure analysis of AI NIC, switch, and networking platforms.
Responsibilities
Perform failure analysis on AI NIC, switch, and networking hardware from engineering validation, manufacturing, and field returns.
Investigate and reproduce hardware and system failures, analyze diagnostic logs and test results, and isolate issues across hardware, firmware, and software.
Debug board-level and system-level failures, including boot issues, Ethernet/PCIe connectivity, interface bring-up, power, thermal, and stability problems.
Work with hardware, firmware, software, and manufacturing teams to identify root causes, implement corrective actions, and validate fixes.
Analyze manufacturing test data and failure trends to identify recurring issues, improve test coverage, and reduce failure rates.
Requirements
BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Nice to have: experience with board-level and system-level hardware diagnostics