Senior Analog Design Engineer
SiTime Corporation · Posted Nov 11, 2026
- Tempe, Arizona, United States
- Senior
- $100K–$137K per year
- 6+ years
Lead the development of key circuit blocks from specification through proven silicon for advanced clock and timing products.
Compensation
$99,900—$137,370 USD
Responsibilities
- Develop circuit specifications for high-performance timing products
- Design analog and custom digital CMOS circuits for high-performance timing products
- Incorporate circuit blocks into the complete chip design
- Collaborate with distributed cross-functional teams, including layout, digital, system design, and validation
- Test, debug, and characterize lab prototypes
Requirements
- Master’s or PhD degree in Electrical Engineering