Referso Jobs

Senior Communications and Signal Processing Engineer

JPL/NASA · Posted Jun 18, 2026

Open

Pasadena, California, United States
Full-time · Senior
$206K–$251K per year
8+ years

Senior Communications and Signal Processing Engineer

JPL/NASA · Posted Jun 18, 2026

Open

Pasadena, California, United States
Full-time · Senior
$206K–$251K per year
8+ years

Research Fellow in Wireless Communications and Digital System Design

GDG on Campus | University of Sydney · Posted Nov 9, 2026

Open

New South Wales, Australia
Full-time · Senior
A$133K–A$157K per year

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Conduct original research and develop advanced wireless communication systems within the School of Electrical and Computer Engineering at the University of Sydney.

Compensation

Base Salary (Level B) $132,533 - $157,381 p.a + 17% superannuation

Responsibilities

conduct original research independently and collaboratively
design and develop advanced wireless communication systems
develop, implement and optimise FPGA-based wireless communication systems
translate wireless communication algorithms into efficient, reliable and high-performance hardware implementations
undertake independent and collaborative research, publishing high-quality research outcomes

Requirements

PhD in Electrical Engineering, Telecommunications, Computer Engineering or a closely related discipline

Skills

wireless communications PHY and MAC algorithms IEEE 802.11 MAC/PHY OFDM MIMO channel coding

Senior FPGA RF Signal Processing Engineer

Muon Space · Posted Jul 15, 2026

Open

Remote
Remote
Full-time · Senior
$158K–$223K per year
5+ years

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Lead FPGA development of RF DSP algorithms for high-performance wireless communication and RF sensing products in a remote, distributed team.

Compensation

The salary range for this role is $158,000-$223,000K, plus a competitive equity grant and comprehensive benefits package.

Responsibilities

Implement and optimize DSP algorithms on FPGAs for real-time execution; support algorithm prototyping in Python and porting to ARM SoCs
Design, simulate, and implement DSP algorithms for RF applications (Communications, ESM, Radar, etc.)
Collaborate with RF hardware engineers on instrument bring-up, calibration routines, and system integration, and team up with other software departments
Author technical documentation, design specifications, and test reports

Requirements

BS/MS in Electrical Engineering, Computer Engineering, or related field
Nice to have: Systems analysis, troubleshooting and design
Nice to have: Distributed team collaboration
Nice to have: Proficiency in C/C++ or Rust for embedded/real-time systems
Nice to have: Experience with Python-based development and analysis

Skills

HDL (Verilog / System Verilog / VHDL)FPGA system architecture and design flows

Embedded AI / 5G Engineer, O-RAN - Paris - H/F

Iliad - Free · Posted Nov 6, 2026

Open

Paris, Île-de-France, France
Hybrid
Full-time · Mid

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The role involves developing and optimizing physical-layer and fronthaul processing for an O-RAN 7.2x system, from algorithm design and simulation to real-time implementation and integration with radio units.

Responsibilities

Developing the 5G uplink receiver chain: channel estimation, interpolation, MMSE equalisation, MIMO detection, LLR computation and LDPC decoding.
Implementing PRACH detection, timing estimation and beamforming for massive MIMO.
Processing O-RAN 7.2x C-plane and U-plane traffic, including eCPRI timing windows and IQ compression.
Implementing real-time L1 functions in C on Linux and accelerating compute-intensive kernels with CUDA, DSP or SIMD.
Building the eCPRI datapath with DPDK using poll-mode I/O, rte_flow, dedicated queues, zero-copy buffers and hardware timestamps.

Requirements

Engineering degree
Master of Science
PhD
Telecommunications
Applied mathematics

Skills

Linear algebra Probability Digital signal processing OFDM MIMO

Senior Communications and Signal Processing Engineer

Senior Communications and Signal Processing Engineer

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Responsibilities

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Research Fellow in Wireless Communications and Digital System Design

Compensation

Responsibilities

Requirements

Skills

Senior FPGA RF Signal Processing Engineer

Compensation

Responsibilities

Requirements

Skills

Embedded AI / 5G Engineer, O-RAN - Paris - H/F

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Requirements

Skills

Benefits

Benefits

Channel coding jobs

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Compensation

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Compensation

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