The Low Latency Trading Infrastructure Engineer designs, delivers, and sustains ultra-low latency infrastructure for Citi's Global Equity Markets technology organization, focusing on engineering deterministic performance at nanosecond precision.
Compensation
$138,720.00 - $208,080.00
Responsibilities
Design low-latency compute topologies including bare-metal servers, NICs, kernel bypass technologies such as DPDK and Solarflare, and FPGA/co-location hardware
Evaluate CPU microarchitecture, NUMA topology, cache behavior, and memory bandwidth characteristics for trading workloads
Define hardware and firmware standards in partnership with vendors including Dell, HPE, Mellanox/NVIDIA Networking, Arista, Cisco, and Juniper
Design and maintain custom server build patterns tailored to the low-latency trading platform
Establish and enforce standards for low latency Linux, Windows, and Microservice infrastructure, including OS optimization, kernel bypass technologies, and CPU isolation
Taking full end-to-end responsibility for the system, architecture, design, implementation, and testing of various complex FPGA-based hardware systems and accelerators.
Responsibilities
Creating complex FPGA-based systems for ultra-low latency applications.
Driving the entire development lifecycle, from characterizing system requirements and specs to defining the SW-HW API.
Applying a systematic approach to analyze and debug complex production issues, pinpointing the root cause in either the hardware or software domain.
Building and implementing hardware analysis and development infrastructures to shorten the development cycles.
Lead electrical system engineering for space-based electronics, providing technical leadership, design, analysis, and risk management across multidisciplinary teams.
Compensation
Minimum $20,000 Sign-On Bonus being offered for external hires.
Responsibilities
Provide technical leadership for a multidisciplinary system team
Lead resolution of electrical hardware anomalies at the system level
Compose objective, quantifiable trade studies
Electrical system-level modeling and simulation, analysis, trades, risk assessment, requirements derivation, allocation, and flow down leveraging DOORs, MBSE, and various other system engineering tools
Maintain end-to-end electrical compatibility, functional allocations, and margins across entire system
Requirements
BS or higher in Engineering or a related technical field
Nice to have: Experience in creating and delivering aerospace electronics systems and subsystems
Nice to have: Experience in creating and delivering space-based electronics systems and subsystems
Nice to have: Technical competence in ROIC photodetector arrays, motor drives including 3 phase, voice coils and steppers, general analog circuitry for thermal control, telemetry gathering and transistor biasing, FPGA closed loop control, DC‑DC conversion and power distribution and harnessing
Nice to have: Analytical experience with WCA and Part Stress
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