Senior DFT Design/Micro architect Engineer
Google · Bengaluru, IndiaOn-site · Senior
DFT Engineering Director, CPU Cores Design for Testability
Advanced Micro Devices, Inc · Austin, US+4 more
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Google · Posted Nov 6, 2026
- Bengaluru, Karnataka, India
- On-site
- Senior
- 8+ years
Shape the future of AI/ML hardware acceleration by designing and verifying DFT strategies for TPU architecture.
- Develop DFT strategy and architecture
- Develop and drive die level DFT validation strategy
- Insert DFT logic, boundary scan, scan chains, DFT Compression, Logic BIST, TAP controller, Clock Control block
- Document DFT architecture, test sequences, and boot-up sequences
- Generate and deliver production and debug patterns to Post Silicon engineering team
- Bachelor's degree in Electrical Engineering
- Nice to have: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science
- Nice to have: IP integration
- Nice to have: fault modeling
- Nice to have: SoC cycles
Advanced Micro Devices, Inc · Posted Nov 3, 2026
- Austin, Texas, United States +4 more
Senior technical leader to drive and develop Design for Testability (DFT) execution and roadmap for future AMD CPUs.
- Austin, Texas, United States
- Santa Clara, California, United States
- Ft. Collins, Colorado, United States
- Boxborough, Massachusetts, United States
- Fishkill, New York, United States
- BSEE or higher in Electrical or Computer Engineering, MSEE preferred
- Nice to have: Experience with x86 architecture
- Nice to have: Familiarity with industry standard DFT tools
- Nice to have: Experience integrating AI into the development environment