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1–2 jobs· newest first

Sr. Silicon Design Engineer
Advanced Micro Devices, Inc · Santa Clara, US
Senior
SMTS Silicon Design Engineer
Advanced Micro Devices, Inc · Santa Clara, US

+10K new in the last hour

Sr. Silicon Design Engineer

Advanced Micro Devices, Inc · Posted Nov 6, 2026

Santa Clara, California, United States
Senior
1+ years

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AI

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Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing.

Responsibilities

Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing
Perform definition, design, verification, and/or documentation for ASIC development
Determine architecture design, logic design, and/or system simulation
Define module interfaces/formats for simulation
Contribute to the development of multidimensional designs involving the layout of complex integrated circuits

Requirements

Master’s degree or foreign equivalent in Electrical and Computer Engineering, Computer Engineering, Electrical Engineering, or related field

Skills

Performing signature triage, debugging regression failures, and implementing verification solutions Performing hardware verification Test plan development and testbench implementation GPU, CPU, or SoC architecture Verilog System Verilog VHDL Python Perl TCL Design flows and methodologies used for chip verification Unix or Linux environments Unix Linux

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SMTS Silicon Design Engineer

Advanced Micro Devices, Inc · Posted Nov 6, 2026

Santa Clara, California, United States
4+ years

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Design verification engineer for AMD’s CDFX DV team, focusing on DFT IP verification, test plan creation, and debugging regression failures.

Responsibilities

Create and develop IP level test plans
Conduct and participate in test plan reviews
Develop scalable verification components
Generate random-constrained stimulus
Debug regression failures

Requirements

Master's degree

Skills

Design verification on complex CPU/ASIC projects Functional design verification Test bench architecture Tool integration Coverage analysis Power domain management Random constrained testing Debugging regression failures

Post-Silicon debug

Feedback integration

Code coverage closure

Leading a small design verification engineering team

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