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1–2 jobs· newest first

Physical Design EngineerNew
Apolis · Santa Clara, US
Contract · Senior
Physical Design EngineerNew
Apolis · Chandler, US
Senior

+10K new in the last hour

A

Physical Design Engineer

Apolis · Posted Nov 6, 2026

Santa Clara, California, United States
Contract · Senior
10+ years

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Physical Design Engineer

Responsibilities

Handle all aspects of SOC implementation from netlist to final GDS including floor-planning, partitioning, place & route, timing optimization, scan mode timing, clock tree insertion, and static timing analysis
Responsible for power grid analysis, signal integrity analysis, and physical, electrical, and formal verification

Requirements

Bachelor's, Electrical Engineering

Skills

Physical Design & Verification tools FirstEncounter ICC2 floorplanning clock tree synthesis timing closure signal integrity IR drop analysis ECO implementation

A

Physical Design Engineer

Apolis · Posted Nov 6, 2026

Chandler, Arizona, United States
Senior
10+ years

Apply with RefersoAI

physical design verification

scripting languages such as Perl/Tcl

Extraction and STA methodology and tools

Physical Design Verification methodology to debug LVS/DRC issues

See full job description

Apply on careers page

Lead physical design and verification for SOC implementation, including floor‑planning, place & route, timing optimization, power grid analysis, signal integrity, and formal verification.

Responsibilities

Handle all aspects of SOC implementation from netlist to final GDS
Perform floor‑planning, partitioning, place & route (P&R), timing optimization, scan mode timing, clock tree insertion, and static timing analysis (STA)
Conduct power grid analysis, signal integrity analysis, and physical, electrical, and formal verification
Debug LVS/DRC issues at chip/block level
Work independently and collaborate with cross‑functional teams

Requirements

Bachelor's in Electrical Engineering

Skills

Place & Route (P&R)Floor‑planning Clock tree synthesis Timing closure Signal integrity IR drop analysis ECO implementation Physical design verification Scripting languages (Perl/Tcl)Extraction STA methodology LVS/DRC debugging FirstEncounter ICC2

See full job description