- San Jose, California, United States
- On-site
- Full-time · Senior
- $144K–$230K per year
- 12+ years
Physical Design Engineer in ASIC Products Division focusing on next generation AI designs.
Compensation
The annual base salary range for this position is USD 143,800.00 To USD 230,000.00
Responsibilities
- Execution of Physical Design, Physical Verification, and Timing Closure
- Timing closure through various methods and strategies; preferable in-depth experience in top-level STA
- EM/IR Analysis
- Place and Route
- Clock Tree Synthesis; experience with custom clock trees, insertion reduction and skew balancing techniques
Requirements
- Bachelor’s degree in Electrical Engineering or Electronics Engineering