- Hsinchu, Hsinchu, Taiwan
- Senior
- 5+ years
We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal circuit designs.
Responsibilities
- Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in groundbreaking sub-micron CMOS technologies using Cadence tools.
- Work multi-functional with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
- Take part in floor planning, custom layout and verifying against design rules and schematics.
Requirements
- BSEE