FY27 Intern - Hardware Design for Post-Quantum Cryptography - 6 months, Sophia
Qualcomm · Posted Nov 9, 2026
- Sophia-Antipolis, Alpes-itimes d'Azur, France
- On-site
- Internship · Intern
Focused on the hardware design of accelerators for post-Quantum cryptography (PQC) to ensure future-proof security against quantum attacks.
Responsibilities
- Design hardware accelerators for post-Quantum cryptography (PQC)
- Collaborate with the architecture team during the specification phase
- Ensure alignment with system-level constraints and integration goals
- Work on cutting edge digital Security SoC and IP for premium tier Snapdragon chip sets
Requirements
- Last year of Master's degree in Microelectronic Engineering
- Nice to have: Tooling
- Nice to have: scripting
- Nice to have: building flow
- Nice to have: CAD environment