Senior member of the LLM inference framework team responsible for building and optimizing production-grade single-node and distributed inference runtimes for large language models on AMD GPUs.
Responsibilities
Architect and optimize distributed LLM inference runtimes based on in-house LLM engines or open-source stacks such as vLLM, SGLang, and llm-d
Design and improve TP / PP / EP (MoE) hybrid execution, including KV-cache management, attention dispatch, and token scheduling
Implement and optimize multi-node inference pipelines using RCCL, RDMA, and collective-based execution
Drive throughput, latency, and memory efficiency across single-GPU and multi-GPU clusters
Lead and support benchmarking of GPU platforms for machine learning and AI workloads, evaluating performance and optimizing hardware and software stacks.
Locations (3)
Amsterdam, North Holland, Netherlands
Europe
United States
Responsibilities
Work closely with hardware and development teams to profile and analyse GPU performance at the system and kernel level.
Evaluate and compare GPU performance across different platforms, architectures, and software stacks (e.g., CUDA, ROCm).
Debug and optimise ML workloads to run efficiently on GPU hardware, identifying and resolving performance bottlenecks.
Perform acceptance testing for new GPU clusters, ensuring hardware and software meet performance, stability, and compatibility requirements for AI workloads.
Lead the Forward Deployed Engineering function within the APAC AI Center of Excellence in Singapore, shaping enterprise and sovereign AI platforms and driving open‑source community engagement.
Responsibilities
Provide technical leadership and operational direction to the Forward Deployed Engineering team
Own the technical qualification process for regional engagements
Drive end‑to‑end technical strategy for large‑scale hybrid cloud AI deployments
Direct design of complex integration layers for client platforms
Act as primary technical bridge to global product and ecosystem engineering hubs
Research, design, develop, and test high-performance collective communication libraries, GPU communication runtimes, and benchmarking tools for AI/HPC workloads on AMD Instinct GPUs and next-generation accelerator platforms.
Responsibilities
Research, design, develop, and test high-performance collective communication libraries, GPU communication runtimes, and benchmarking tools for AI/HPC workloads.
Design, develop, optimize, troubleshoot, and debug software that enables efficient multi-GPU and multi-node communication across AMD's ROCm software stack.
Contribute to open-source libraries for GPU communication, including RCCL (ROCm Collective Communications Library) and benchmarking tools including TransferBench.
Maximize bandwidth utilization and minimize latency across PCIe, Infinity Fabric (xGMI), and high-speed network interconnects (RDMA/RoCE/InfiniBand).
Develop and tune collective algorithms (AllReduce, AllGather, ReduceScatter, Broadcast, AllToAll, etc.) for distributed training and inference frameworks such as PyTorch, JAX, Megatron-LM, DeepSpeed, and vLLM.
Architect and drive the AI Software Stack by establishing best practices and optimizing performance from the lowest-level GPU kernels to large-scale distributed systems.
Responsibilities
Architect and drive the AI Software Stack
Optimize performance from lowest-level GPU kernels to large-scale distributed systems
Leverage Large Language Models (LLMs) and agent-based technologies to accelerate the AMD ROCm ecosystem
Accelerate applications such as foundation models and autonomous AI agents
Contribute to the entire co-design lifecycle, influencing future GPU architectures
We are seeking a highly skilled GPU Kernel Engineer who is passionate about pushing the limits of performance on modern accelerators. This involves designing and optimizing custom GPU kernels that power next-generation large-scale AI systems.
Compensation
Competitive salary and equity
Responsibilities
Design, implement, and optimize custom GPU kernels using C++, PTX, CUDA, ROCm, Triton, and/or JAX Pallas.
Profile and optimize end-to-end performance of ML operations, with a focus on large-scale LLM training and inference.
Integrate low-level GPU kernels into frameworks such as PyTorch, JAX, and custom internal runtimes.
Develop performance models, identify bottlenecks, and deliver kernel-level improvements that significantly accelerate AI workloads.
Collaborate with ML researchers, distributed systems engineers, and model-serving teams to optimize compute performance across the stack.
Senior Silicon Design Engineer to co‑design the hardware‑software interface for AMD Instinct GPUs, modeling performance and power across the AI compute stack.
Locations (2)
San Jose, California, United States
Bellevue, Washington, United States
Responsibilities
Build performance and power models linking architectural decisions to real workload behavior
Evaluate hardware features and software API designs against AI training and inference targets
Write and optimize GPU kernels and compiler passes for microarchitectural characteristics
Work across the stack including Linux kernel DRM/GEM, ROCm runtime, IREE compiler, and AI frameworks like PyTorch and Triton
Leverage performance models to drive software optimization and hardware design feedback
Requirements
Bachelor's in Computer Science
Master's in Computer Science
Nice to have: Experience with AMD Instinct GPU architectures (MI300X, MI350X, MI355X)
Perform experiments across diverse GPU system configurations to assess the impact of varying interconnect strategies and system-level optimisations on performance and scalability.
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