- Austin, Texas, United States
- On-site
- Full-time · Senior
- 4+ years
Seeking a Senior Digital Design Verification Engineer to develop complex power management SoCs integrating digital control, telemetry, and advanced power functions.
Responsibilities
- Own verification of complex digital blocks or major SoC features from requirements analysis through coverage closure.
- Develop feature-based verification plans from product, architecture, and microarchitecture specifications; identify gaps, ambiguities, corner cases, and risks.
- Build and extend reusable SystemVerilog/UVM environments, including sequences, monitors, scoreboards, checkers, assertions, and coverage models.
- Develop constrained random and targeted tests for normal operation, error handling, recovery, and system-level interactions.
- Drive functional, code, toggle, FSM, and assertion coverage closure using regression and coverage data.
Requirements
- Bachelor's degree in Electrical Engineering
- Master's degree in Electrical Engineering
- Computer Engineering
- Computer Science
- Nice to have: SoC verification