- Cupertino, California, United States
- On-site
- Full-time
- $150K–$225K per year
- 1+ years
Collaborate with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
Compensation
The base pay range for this role is between $150,400 - $225,300/yr
Responsibilities
- Collaborate with the logic design team to understand partition architecture and drive physical aspects early in the design cycle
- Complete netlist to GDS2 implementation for partition(s) while meeting schedule and design goals
- Perform timing, physical, and electrical verification, and drive the sign off closure for the partitions
- Resolve and improve design and flow issues related to physical design, identifying potential solutions, and driving execution
- Explore and implement low power techniques to improve power density for the partitions
Requirements
- Master's degree or foreign equivalent in Electrical and Computer Engineering or related field