- Austin, Texas, United States +2 more
- Hybrid
- Full-time
- $100K–$500K per year
- 5+ years
Design for Test (DFT) engineer for high‑performance AI/ML ASIC/SoC designs.
Locations (3)
- Austin, Texas, United States
- Fort Collins, Colorado, United States
- Santa Clara, California, United States
Compensation
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets.
Responsibilities
- Implement and integrate DFT features (scan, JTAG, compression, ASST, MBIST) into RTL from early design through tapeout across multiple IPs.
- Own ATPG, test coverage analysis, and gate‑level simulation (e.g., with Synopsys VCS/Verdi) to achieve and maintain high‑quality test coverage.
- Plan, implement, and verify MBIST, and work closely with Test Engineering on test planning, pattern delivery, and debug.