Lead verification lifecycle for ASIC design and verification.
Compensation
$121,800.00 - $182,600.00
Responsibilities
Applies ASIC knowledge to define, model, design, optimize, verify, validate, implement, and document IP for high performance, low power products.
Creates architectures, circuit specifications, logic designs, and system simulations based on system-level requirements.
Collaborates across teams to develop and execute implementation strategy that meets system requirements and customer needs.
Evaluates all aspects of process flow from high-level design to synthesis, place and route, timing and power use, and verification for custom circuit design/layout flow.
Utilizes tools/applications such as RTL to GDS Flow and Virtuoso to execute and enable architecture and design of an individual block/SoC or IC Package.
Requirements
Bachelor's degree in Engineering, Science, or a closely related field
Master's degree in Science, Engineering, or related field
PhD in Science, Engineering, or related field
Nice to have: Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science
Nice to have: 3+ years of ASIC design, verification, validation, integration experience
The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware UPF verification flow and methodology. Involve in developing automation to improve verification efficiency.
Compensation
$121,800.00 - $182,600.00
Responsibilities
Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.
Create architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
Collaborate across teams to develop and execute an implementation strategy that meets system requirements and customer needs.
Evaluate all aspects of process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
Utilize tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of an individual block/SoC or IC Package.
Requirements
Bachelor's degree in Engineering, Science, or a closely related field
Master's degree in Science, Engineering, or related field
