Testbench-based debugging jobs

CPU RTL Microarchitecture/Design Engineer

RosaicLabs · Posted Sep 29, 2026

Santa Clara, California, United States
Full-time

Apply with RefersoAI Apply on careers page

Design and implement CPU functional blocks based on microarchitecture specifications, develop, debug, and optimize RTL, analyze performance, timing, area, and power tradeoffs, work with verification and physical design engineers, participate in reviews and write documentation.

Responsibilities

Design and implement CPU functional blocks based on microarchitecture specifications
Develop, debug, and optimize RTL using SystemVerilog/Verilog
Analyze performance, timing, area, and power tradeoffs and propose improvements
Work with verification engineers to develop test plans and achieve functional coverage
Partner with physical design engineers on area, timing, and power goals

Requirements

Bachelor's or Master's degree (or near-term graduation) in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Skills

Verilog SystemVerilog RTL simulation Testbench-based debugging ASIC design flow RTL design