- Bangalore, India
- Lead
- 15+ years
A recognized technical leader who thinks in systems, not individual IP blocks, defining technical strategy and leading engineering transformation across organizational boundaries to build the next generation of subsystem interoperability verification.
Compensation
Your recruiter will provide more details about the salary range and benefits during the hiring process.
Responsibilities
- Define the technical vision for subsystem interoperability spanning Controller, PHY, firmware, VIP, verification environments, and customer configurations across multiple high-speed interface IP families
- Architect a scalable Interop Verification Platform that enables continuous integration, verification, and qualification across IP releases
- Establish reusable verification architectures, methodologies and golden reference environments covering functional verification, protocol compliance, error and stress scenarios, coverage, assertions, CDC/RDC and system initialization
- Lead the most complex cross-IP technical investigations and drive systemic solutions across RTL, PHY, firmware, VIP, testbench and implementation boundaries when interoperability issues surface
- Partner with Controller and PHY architects and R&D teams to influence interfaces, observability, design-for-verification and subsystem architecture early in the development lifecycle
Requirements
- Nice to have: CDC/RDC
- Nice to have: formal verification
- Nice to have: emulation/prototyping