Jobs Referso Partner API

Free job alerts

Physical verification flows jobs

Job titleLocation

Popular:United States Canada Viet Nam

All filtersRefine by skill, company, date, job type, industry and more

Company

Skillsjobs that use all of them

physical verification flows

Popular

Date posted

Any timePast hourPast 24 hoursPast week

Workplace

RemoteHybridOn-site

Job type

Full-timePart-timeContractInternshipTemporary

Experienceyears required

0–2 years2–5 years5–10 years10+ years

Salary

Salary listed

Education

High schoolAssociate degreeBachelor's degreeProfessional certificatePostgraduate degree

Industryfield of work

Software & InternetHardware & ElectronicsEngineeringHealthcareLife Sciences & ResearchFinance & AccountingSales & Business DevelopmentMarketing & CommunicationsCreative & DesignCustomer Service & SupportAdministrative & OfficeHuman Resources & RecruitingLegal & ComplianceManagement & OperationsEducation & TrainingRetailHospitality & Food ServiceManufacturing & ProductionSkilled Trades & ConstructionTransportation & LogisticsFacilities, Cleaning & SecuritySocial Services & Public SectorEnergy, Environment & Agriculture

1 selected

Skill:physical verification flows

Referso Jobs

Fresh jobs from employer career sites in the US and Europe. Search free, get alerts free, and let Referso apply when you're ready.

Job seekersSearch jobs Free job alerts Remote jobs Jobs by location Jobs by skill

RefersoAuto-apply How it works Pricing Log in

For companiesPartner API (beta)API docs Contact sales

CompanyAbout Contact Privacy Terms

© 2026 Referso. Jobs link to the original posting; Referso is not affiliated with the employers listed.Privacy Terms Request a removal

1–2 jobs· newest first

Senior ASIC Physical Design EngineerNew
K2 Space · Remote, US
$170K–$250KRemote · Senior
Senior Principal Engineer, Device Design
Intel Corporation · Hillsboro, US+2 more
$265K–$375KHybrid · Full-time · Senior

+10K new in the last hour

Senior ASIC Physical Design Engineer

K2 Space · Posted Nov 12, 2026

Remote, United States
Remote
Senior
$170K–$250K per year
5–10 years

Apply with RefersoAI Apply on careers page

Lead the physical design of advanced SoCs for high‑power satellite systems.

Compensation

Base salary range for this role is $170,000 – $250,000 + equity in the company

Responsibilities

Execute the complete physical design flow for complex SoC blocks and top-level integration, including synthesis, floorplanning, place & route, CTS, STA, and physical verification.
Perform timing closure and optimization across multiple corners and modes using industry-standard tools.
Collaborate with front-end, verification, and DFT teams to ensure clean handoff and predictable convergence.
Work with external physical design service providers and internal leads to review deliverables, resolve issues, and ensure schedule alignment.
Develop and maintain scripts and automation to improve flow efficiency and consistency.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
Nice to have: radiation-hardened or space-qualified ASICs
Nice to have: chip-package co-design or advanced packaging (2.5D/3D)
Nice to have: physical design service vendor management or offshore collaboration
Nice to have: sign-off through TSMC

Skills

Synopsys ICC2/Fusion Compiler Cadence Innovus timing analysis power optimization physical verification flows hierarchical or flat SoC design methodologies FinFET technologies DFT UPF/CPF power intent ECO implementation

Benefits

paid time off
medical/dental/vision coverage
life insurance
paid parental leave

See full job description

Senior Principal Engineer, Device Design

Intel Corporation · Posted Nov 6, 2026

Hillsboro, Oregon, United States +2 more
Hybrid
Full-time · Senior
$265K–$375K per year
15+ years

Apply with RefersoAI Apply on careers page

Lead technical strategy, architecture, and device design for high-volume semiconductor manufacturing.

Locations (3)

Hillsboro, Oregon, United States
Phoenix, Arizona, United States
Santa Clara, California, United States

Compensation

Annual Salary Range for jobs which could be performed in the US: $265,480.00-374,800.00 USD

Responsibilities

Lead cross-functional teams in defining semiconductor architectures
Partner with customers and internal groups to translate product needs into silicon solutions
Drive development of customized semiconductor features
Set device and interconnect performance targets
Coordinate technology handoffs across engineering groups

Requirements

Master's degree in Electrical Engineering, Physics, or Material Science
Nice to have: Advanced-node transistor design
Nice to have: Scaling
Nice to have: Low-power
Nice to have: Analog

Skills

CMOS device physics Device design Semiconductor technology development Design rule governance Statistical data analysis Design of Experiments Physical verification flows DRC development Mask generation High-Volume Manufacturing Statistical Process Control DRC DOE Statistical analysis tools

Benefits

Health insurance
Retirement plan
Vacation
Stock bonuses

See full job description