- Bangalore, India
- Senior
- 7+ years
Signal and Power Integrity Engineer responsible for delivering system-level signal and power integrity solutions for high‑speed systems, boards and packages.
Responsibilities
- Develop SI rules, review design implementation, build test plans, and document characterization & measurement reports.
- Improve & optimize design margins through interconnect, timing and crosstalk analysis, 3D EM & channel simulations for high‑speed designs.
- Design & characterize test structures & channel models to correlate simulations with measurements for Serdes and interconnects.
- Collaborate with multi‑functional teams - HW, PCB Layout, SW, MFG, ASIC.
- Be responsible for electrical characterization and verification of Transmitter/Receiver SERDES settings to meet industry standards and internal Cisco requirements.
Requirements
- Bachelor's or Master’s Degree in Electrical Engineering